When data processors were of the main frame form, expansions to the instruction or register set were typically implemented by simply adding additional electronics to the central processing unit (CPU), although significant expansions may have required additional cabinet space and power supply capacity. With the advent of minicomputers, such enhancements were more difficult to integrate into existing enclosures. One alternative to expanding the CPU was to provide the additional circuitry in a separate "hardware assist" module. However, this implementation required many of the signals otherwise internal to the CPU to be brought out via wiring harnesses to the module. In addition, the CPU often required new signals in order to coordinate the processing activities of the module. One form of this type of interface was used by Digital Equipment Corporation to couple the PDP-11 to the FP-11C Floating Point Processor.
As microprocessors matured, designers began to consider ways of providing the instruction/register enhancements which were not economically or technically feasible in monolythic form. A major effort was made to reduce the complexity of the interface. One conclusion was that more autonomy had to be built into the new hardware so that less information and control had to be provided by the CPU. This new breed of machine became known as coprocessors, since they really operated in cooperation with the processor rather than as a simple extension of the processor.
In general, coprocessors have been of two forms: those which monitor the processor's instruction stream to detect coprocessor instructions; and those which rely upon the processor for all information relating to coprocessor functions. One example of the first form is the Intel 8087 Numeric Data Processor which monitors the instruction of the Intel 8086 Processor looking for coprocessor instructions. This implementation requires significant hardware to enable the coprocessor to track the instruction queue in the processor. In addition, the 8086/8087 interface includes several special purpose signals for coordinating coprocessing activity. Another example of the first form is the Zilog Corporation Z8001/2 Extended Processor Units. As with the Intel interface, the Zilog interface requires significant duplication of hardware in the coprocessor and several special purpose signals. An example of the second form is the National Semiconduction Corporation NS16000 Slave Processors, which can be coupled to the processor either as a slave or as a peripheral. As a slave, the coprocessor relies on the processor for all instruction and operand information. This requires the processor to be able to determine from each coprocessor instruction exactly what information the coprocessor will need about the instruction. In addition, the processor must know where to find the Effective Address information within each instruction so that the operands may be pre-fetched for the coprocessor. As in the other examples, the National scheme requires some special purpose control lines for coordinating coprocessing activity.
No processor to coprocessor interface is known which requires no special signals, but rather relies wholly on standard bus cycles. Nor is any interface known which allows the processor to be unconcerned about the specific content of coprocessor instructions.